A voltage controlled oscillator (VCO) is an oscillator which can control the frequency of an output clock in response to a control voltage. CMOS type voltage controlled oscillators are increasingly used because of characteristics that can include a good noise margin and low power consumption.
Two main types of oscillators are LC oscillators, which include LC resonance components, and ring oscillators, which include a chain of delay cells. The ring oscillator is usually suitable for CMOS fabrication processes due to its ease of integration and wide tuning range.
The performance of a ring oscillator generally depends on the operating characteristics of its delay cells. An inverter can be a simplest type of delay cell. For example, an odd number of inverters can be connected serially in a chain to form a ring oscillator. The output clock frequency of a voltage controlled oscillator can be inversely proportional to a delay time of the delay cells. Minimum propagation delay through such inverters creates a limit on the maximum output clock frequency from the ring oscillator, and which may not be sufficient for more recent high speed devices such as in communication devices. Various different types of delay cell have been developed for use in ring oscillators in an attempt to obtain higher output frequency. For example, a differential type delay cell has been developed in which the output signal has a small swing range so as to reduce propagation delay time.
FIG. 1 is a circuit diagram that illustrates a conventional differential type delay cell having a differential input signal and a differential output signal.
Referring to FIG. 1, a first input signal IN of the differential input signal and a second input signal INB of the differential input signal are respectively input to gates of a first input transistor 113 and a second input transistor 114. A current source control voltage VCN is applied to a gate of a transistor 130 operating as a current source that controls the amount of current supplied to the first transistor 113 and the second transistor 114.
An output load control voltage VCP applied to output load circuits 140a and 140b controls resistances of output load circuits 140a and 140b so as to adjust a delay time of a first output signal OUTB of the differential output signal and a second output signal OUT of the differential output signal. The output load circuits 140a and 140b can have various configurations.
FIG. 2A and FIG. 2B show exemplary delay cells having various types of output load circuits.
Referring to FIG. 2A, delay cell 200 has output load circuits 210a and 210b. Each of the output load circuits 210a and 210b has a transistor gate to which the control voltage VCP is applied in order to control the output load. When the control voltage VCP increases, the resistances of the transistors included in the output load circuits 210a and 210b increase.
Referring to FIG. 2B, delay cell 250 has output load circuits 260a and 260b. Each of the output load circuits 260a and 260b has a diode-connected transistor operating as an output load.
The output load circuit 140a and the output load circuit 140b of the delay cell illustrated in FIG. 1 have a PMOS transistor 141 and 143, respectively, and a diode-connected PMOS transistor 142 and 144, respectively. For the output load circuits 140a, 140b illustrated in FIG. 1, the PMOS transistors 141 and 143 usually operate in a deep-triode region so that the resistances of the PMOS transistors 141 and 143 are linearly proportional to the control voltage VCP. In contrast, the diode connected PMOS transistors 142 and 144 always operate in a saturation region to thereby maintain almost constant resistances.
The delay time of a delay cell is typically proportional to a time constant of the delay cell. The time constants of the delay cell illustrated in FIG. 1 can be represented by the following Equation 1:
                                                        τ              =                            ⁢                                                (                                      resistance                    ⁢                                                                                  ⁢                    of                    ⁢                                                                                  ⁢                    output                    ⁢                                                                                  ⁢                    load                    ⁢                                                                                  ⁢                    circuit                                    )                                ×                                  C                  out                                                                                                        =                            ⁢                              (                                                      R                    on                                    ⁢                                                                                R                                              diode                        -                        connected                                                              )                                    ×                                      C                    out                                                                                                                          =                            ⁢                                                                    R                                          diode                      -                      connected                                                        /                                      (                                          1                      +                                                                        R                                                      diode                            -                            connected                                                                          /                                                  R                          on                                                                                      )                                                  ×                                  C                  out                                                                                                        =                            ⁢                                                R                                      diode                    -                    connected                                                  /                                  (                                      1                    +                                          R                                              diode                        -                        connected                                                                                                                                                                                                    ⁢                                  k                  ⁢                                      (                                                                  V                        DD                                            -                                              V                        CP                                            -                                                                                                V                          THP                                                                                                              )                                                  )                            ×                              C                out                                                                        (                  Equation          ⁢                                          ⁢          1                )            
Cout in Equation 1 represents a total capacitance seen from the first output signal (OUTB) generation point 111 or from the second output signal (OUT) generation point 112 to ground. A total resistance of the output load circuits 140a or 140b is equal to a resistance of a parallel combination (show in Equation 1 as “∥”) of transistor 141 and the diode connected transistor 142 or the transistor 143 and the diode connected transistor 144. The symbol “Ron” represents the resistance of the transistor 141 or 143, and “Rdiode-connected” represents the resistance of the diode connected transistor 142 or 144. The symbol “k” represents a device constant of the transistor 141 or 143.
As described above, when the resistance of the diode connected transistor is maintained constant, the total resistance of the output load circuit 140a or 140b and a power supply voltage VDD are then related such that when the power supply voltage VDD increases, the total resistance of the output load circuit decreases, and when the power voltage VDD decreases, the total resistance of the output load circuit increases. As a result, the time constant τ of the delay cell varies with variation of the power supply voltage VDD that is applied to the delay cell.
As also described above, a delay time TD of the delay cell is inversely proportional to an output clock frequency of a ring oscillator, and can be proportional to the time constant τ in Equation 1. Consequently, the output clock frequency of a ring oscillator can be inversely proportional to the time constant τ of its delay cell(s), and which may be represented by the following Equation 2.
                                                                        f                osc                            ∝                            ⁢                              1                /                                  T                  D                                                                                                                        ∝                                ⁢                                  1                  /                  τ                                            ,                                                          (                  Equation          ⁢                                          ⁢          2                )            
where “fosc” is the output clock frequency of the ring oscillator and “TD” is the delay time of the delay cell(s).
It has become common for single chip to include a large number of transistors and to include a voltage-controlled oscillator on the chip using a CMOS fabrication process. The high speed on-off switching operations of the many transistors can introduce noise into the on-chip power supply voltage. Such noise in the power supply voltage can cause instability in the time constant τ of an on-chip delay cell, such as one that operates in accordance with Equation 1, and can result in instability in the output clock frequency of a ring oscillator, such as one that operates in accordance with the Equation 2.
Generating a stable delay time from a delay cell can be very important to the generation of a stable clock signal from a ring oscillator. Instability in the delay time of a delay cell, such as due to power supply voltage noise, may cause clock jitter which can result in erroneous operation in high speed communication systems and/or memory systems.